The course "FPGA Architecture Based System for Industrial Application Using Vivado" is a comprehensive program that focuses on the design and implementation of FPGA-based VLSI systems for industrial applications. Participants will gain practical knowledge and hands-on experience in utilizing Xilinx Vivado software with Artix 7 FPGA boards to develop digital arithmetics, integrate sensors and motors, implement communication protocols, and create IoT applications.
FPGA Architecture Based System for Industrial Application
FPGA Architecture Based System for Industrial Application
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Professionals in Industrial Automation Department, FPGA Engineering Department, IoT Integration Department, Digital System Applications Department.
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3 项作业
授课语言：英语（English）
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本课程是 Chip based VLSI design for Industrial Applications 专项课程 专项课程的一部分
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该课程共有3个模块
This immersive module is meticulously designed to introduce participants to the world of VHDL programming, focusing on its application to FPGA (Field Programmable Gate Array) design using the Artix 7 FPGA board and Xilinx Vivado software. Beginning with an overview of the Artix 7 FPGA board and the significance of Xilinx Vivado in FPGA projects, the module leads learners through the practical aspects of setting up and simulating basic digital logic circuits. Participants will gain hands-on experience in creating projects from scratch, writing VHDL code for various digital functions, and implementing these designs on the FPGA board. Key concepts such as LED control, push button input handling, and more advanced digital circuits like adders and multipliers will be explored. Through step-by-step guidance, this module aims to equip learners with the knowledge and skills to efficiently develop their FPGA projects, from conceptual VHDL coding to physical implementation and real-time testing on the Artix 7 FPGA board.
涵盖的内容
46个视频3篇阅读材料1个作业
46个视频• 总计211分钟
- About the Specialization• 3分钟
- About the Course• 6分钟
- Introduction to Artix 7 FPGA Development Board Part - 1• 6分钟
- Introduction to Artix 7 FPGA Development Board Part - 2• 2分钟
- Introduction to Artix 7 FPGA Development Board Part - 3• 3分钟
- Introduction to Artix 7 FPGA Development Board Part - 4• 3分钟
- Introduction to Artix 7 FPGA Development Board Part - 5• 4分钟
- Introduction to Artix 7 FPGA Development Board Part - 6• 7分钟
- Vivado Installation and Demo on Vivado Design Flow Part - 1• 7分钟
- Vivado Installation and Demo on Vivado Design Flow Part - 2• 11分钟
- Vivado Installation and Demo on Vivado Design Flow Part - 3• 2分钟
- Demo on VLSI Design and Interfacing FPGA for Switching On and Off LED by SPDT part -1• 2分钟
- Demo on VLSI Design and Interfacing FPGA for Switching On and Off LED by SPDT part -2• 4分钟
- Demo on VLSI Design and Interfacing FPGA for Switching On and Off LED by SPDT part -3• 6分钟
- Demo on VLSI Design and Interfacing FPGA for Switching On and Off LED by SPDT part -4• 5分钟
- Demo on VLSI Design and Interfacing FPGA for Switching On and Off LED by SPDT part -5• 4分钟
- Demo on VLSI Design and Interfacing FPGA for Displaying the Push Button State on LEDs part -1• 2分钟
- Demo on VLSI Design and Interfacing FPGA for Displaying the Push Button State on LEDs part -2• 1分钟
- Demo on VLSI Design and Interfacing FPGA for Displaying the Push Button State on LEDs part -3• 6分钟
- Demo on VLSI Design and Interfacing FPGA for Displaying the Push Button State on LEDs part -4• 6分钟
- Demo on VLSI Design and Interfacing FPGA for Displaying the Push Button State on LEDs part -5• 4分钟
- Demo on VLSI Design and Implementing Half Adder using FPGA Board Part-1• 1分钟
- Demo on VLSI Design and Implementing Half Adder using FPGA Board Part-2• 1分钟
- Demo on VLSI Design and Implementing Half Adder using FPGA Board Part-3• 6分钟
- Demo on VLSI Design and Implementing Half Adder using FPGA Board Part-4• 8分钟
- Demo on VLSI Design and Implementing Half Adder using FPGA Board Part-5• 3分钟
- Demo on VLSI Design and Implementing full adder using FPGA Board Part-1• 1分钟
- Demo on VLSI Design and Implementing full adder using FPGA Board Part-2• 1分钟
- Demo on VLSI Design and Implementing full adder using FPGA Board Part-3• 11分钟
- Demo on VLSI Design and Implementing full adder using FPGA Board Part-4• 9分钟
- Demo on VLSI Design and Implementing full adder using FPGA Board Part-5• 4分钟
- Demo on VLSI Design and Implementing 4-Bit Ripple Carry Adder using FPGA Board Part-1• 2分钟
- Demo on VLSI Design and Implementing 4-Bit Ripple Carry Adder using FPGA Board Part-2• 2分钟
- Demo on VLSI Design and Implementing 4-Bit Ripple Carry Adder using FPGA Board Part-3• 8分钟
- Demo on VLSI Design and Implementing 4-Bit Ripple Carry Adder using FPGA Board Part-4• 7分钟
- Demo on VLSI Design and Implementing 4-Bit Ripple Carry Adder using FPGA Board Part-5• 4分钟
- Demo on VLSI Design and Implementing Carry Look-Ahead Adder using FPGA Board part-1• 6分钟
- Demo on VLSI Design and Implementing Carry Look-Ahead Adder using FPGA Board part-2• 2分钟
- Demo on VLSI Design and Implementing Carry Look-Ahead Adder using FPGA Board part-3• 8分钟
- Demo on VLSI Design and Implementing Carry Look-Ahead Adder using FPGA Board part-4• 7分钟
- Demo on VLSI Design and Implementing Carry Look-Ahead Adder using FPGA Board part-5• 4分钟
- Demo on VLSI Design and Implementing 4x4 Multiplier using FPGA Board part-1• 3分钟
- Demo on VLSI Design and Implementing 4x4 Multiplier using FPGA Board part-2• 2分钟
- Demo on VLSI Design and Implementing 4x4 Multiplier using FPGA Board part-3• 7分钟
- Demo on VLSI Design and Implementing 4x4 Multiplier using FPGA Board part-4• 6分钟
- Demo on VLSI Design and Implementing 4x4 Multiplier using FPGA Board part-5• 4分钟
3篇阅读材料• 总计30分钟
- Specialization Reading• 10分钟
- Course Reading• 10分钟
- Course Glossary• 10分钟
1个作业• 总计30分钟
- Assessment - FPGA Based VSLI Design and Implementation for Digital Arithmetics Using Vivado • 30分钟
This module offers a comprehensive journey through the design and implementation of embedded components and communication protocols on FPGA using Xilinx Vivado. It starts with the basics of sound generation using buzzers controlled by FPGA, extending to sophisticated digital displays and serial communication protocols. Students will engage in hands-on projects that include interfacing with 7-segment displays and LCDs, and implementing serial communication protocols such as RS232, I2C, and SPI. Each section includes developing VHDL code, configuring constraint files for precise hardware interaction, and analyzing RTL schematics for a deeper understanding of the underlying hardware logic. The module culminates with real-world implementation on the Artix 7 FPGA development board, ensuring students can apply theoretical knowledge to tangible FPGA projects.
涵盖的内容
27个视频1个作业
27个视频• 总计148分钟
- Demonstration of Interfacing FPGA to Produce Sound at Regular Intervals in Buzzer part-1• 2分钟
- Demonstration of Interfacing FPGA to Produce Sound at Regular Intervals in Buzzer part-2• 12分钟
- Demonstration of Interfacing FPGA to Produce Sound at Regular Intervals in Buzzer part-3• 2分钟
- Demonstration of Interfacing FPGA for Displaying Decimal Counter on 7 Segment Display Part-1• 5分钟
- Demonstration of Interfacing FPGA for Displaying Decimal Counter on 7 Segment Display Part-2• 1分钟
- Demonstration of Interfacing FPGA for Displaying Decimal Counter on 7 Segment Display Part-3• 7分钟
- Demonstration of Interfacing FPGA for Displaying Decimal Counter on 7 Segment Display Part-4• 11分钟
- Demonstration of Interfacing FPGA for Displaying Decimal Counter on 7 Segment Display Part-5• 2分钟
- Demonstration of Interfacing FPGA with 16x2 LCD for Displaying Message part-1• 5分钟
- Demonstration of Interfacing FPGA with 16x2 LCD for Displaying Message part-2• 1分钟
- Demonstration of Interfacing FPGA with 16x2 LCD for Displaying Message part-3• 7分钟
- Demonstration of Interfacing FPGA with 16x2 LCD for Displaying Message part-4• 6分钟
- Demonstration of Interfacing FPGA with 16x2 LCD for Displaying Message part-5• 2分钟
- Understanding RS232 Serial Communication Protocol part-1• 6分钟
- Understanding RS232 Serial Communication Protocol part-2• 4分钟
- RS232 Serial Communication Protocol Implementation using VHDL part-1• 3分钟
- RS232 Serial Communication Protocol Implementation using VHDL part-2• 7分钟
- RS232 Serial Communication Protocol Implementation using VHDL part-3• 8分钟
- Understanding I2C Protocol part-1• 5分钟
- Understanding I2C Protocol part-2• 4分钟
- I2C Protocol Implementation with VHDL part-1• 7分钟
- I2C Protocol Implementation with VHDL part-2• 7分钟
- I2C Protocol Implementation with VHDL part-3• 9分钟
- Understanding SPI Protocol• 6分钟
- SPI Protocol Implementation with VHDL part -1• 4分钟
- SPI Protocol Implementation with VHDL part -2• 9分钟
- SPI Protocol Implementation with VHDL part -3• 9分钟
1个作业• 总计30分钟
- Assessment - FPGA Based VLSI Design and Implementation of Embedded Components and Communication Protoclos Using Vivado• 30分钟
This module delves into the integration of sensors and motors with FPGA using Xilinx Vivado, focusing on industrial applications. Participants will explore various sensors including accelerometers, gesture recognition sensors, capacitive touch sensors, ultrasonic sensors, as well as the principles and interfacing of motors like stepper motors and DC motors. The module covers topics such as sensor basics, VHDL code design, pin configurations, and simulation techniques using Vivado. Additionally, it introduces IoT concepts and VGA interfaces for remote monitoring and control of industrial systems, providing a comprehensive understanding of sensor-motor integration in FPGA-based VLSI design.
涵盖的内容
50个视频1个作业
50个视频• 总计254分钟
- Demonstration of Interfacing FPGA with 3 Axis Accelerometer Sensor - Part 1• 5分钟
- Demonstration of Interfacing FPGA with 3 Axis Accelerometer Sensor - Part 2• 1分钟
- Demonstration of Interfacing FPGA with 3 Axis Accelerometer Sensor - Part 3• 8分钟
- Demonstration of Interfacing FPGA with 3 Axis Accelerometer Sensor - Part 4• 10分钟
- Demonstration of Interfacing FPGA with 3 Axis Accelerometer Sensor - Part 5• 11分钟
- Demonstration of Interfacing FPGA with 3 Axis Accelerometer Sensor - Part 6• 3分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 1 • 4分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 2• 1分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 3• 10分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 4• 7分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 5• 10分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 6• 6分钟
- Demonstration of Interfacing FPGA with Hand Gesture Recognition Sensor - Part 7• 2分钟
- Demonstration of Interfacing FPGA with Capacitive Touch Sensor - Part 1• 2分钟
- Demonstration of Interfacing FPGA with Capacitive Touch Sensor - Part 2• 1分钟
- Demonstration of Interfacing FPGA with Capacitive Touch Sensor - Part 3• 11分钟
- Demonstration of Interfacing FPGA with Capacitive Touch Sensor - Part 4• 2分钟
- Demonstration of Interfacing FPGA with Capacitive Touch Sensor - Part 5• 1分钟
- Demonstration of Interfacing FPGA with Ultrasonic Sensor - Part 1• 4分钟
- Demonstration of Interfacing FPGA with Ultrasonic Sensor - Part 2• 1分钟
- Demonstration of Interfacing FPGA with Ultrasonic Sensor - Part 3• 9分钟
- Demonstration of Interfacing FPGA with Ultrasonic Sensor - Part 4• 13分钟
- Demonstration of Interfacing FPGA with Ultrasonic Sensor - Part 5• 3分钟
- Demonstration of Interfacing FPGA with Stepper Motor - Part 1 • 3分钟
- Demonstration of Interfacing FPGA with Stepper Motor - Part 2• 13分钟
- Demonstration of Interfacing FPGA with Stepper Motor - Part 3• 1分钟
- Demonstration of Interfacing FPGA with Stepper Motor - Part 4• 2分钟
- Demonstration of Interfacing FPGA with Stepper Motor - Part 5• 1分钟
- Demonstration of Interfacing FPGA with DC Motor - Part 1• 2分钟
- Demonstration of Interfacing FPGA with DC Motor - Part 2• 2分钟
- Demonstration of Interfacing FPGA with DC Motor - Part 3• 10分钟
- Demonstration of Interfacing FPGA with DC Motor - Part 4• 4分钟
- Demonstration of Interfacing FPGA with DC Motor - Part 5• 1分钟
- Demonstration of Interfacing FPGA with Servo Motor part-1• 3分钟
- Demonstration of Interfacing FPGA with Servo Motor part-2• 2分钟
- Demonstration of Interfacing FPGA with Servo Motor part-3• 7分钟
- Demonstration of Interfacing FPGA with Servo Motor part-4• 8分钟
- Demonstration of Interfacing FPGA with Servo Motor part-5• 3分钟
- Demonstration of Interfacing VGA Monitor with FPGA Device Part-1• 5分钟
- Demonstration of Interfacing VGA Monitor with FPGA Device part-2• 16分钟
- Demonstration of Interfacing VGA Monitor with FPGA Device part-3• 1分钟
- Demonstration of Interfacing VGA Monitor with FPGA Device part-4• 2分钟
- Demonstration of Interfacing VGA Monitor with FPGA Device part-5• 1分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-1• 3分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-2• 2分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-3• 9分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-4• 5分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-5• 8分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-6• 8分钟
- Monitoring Temperature And Intensity through IoT with FPGA Device part-7• 4分钟
1个作业• 总计30分钟
- Assessment on FPGA Based VLSI Design and Implementation of Sensors and Motors for Industrial Application Using Vivado• 30分钟
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