This course gives you a complete insight into the modern design of digital systems fundamentals from an eminently practical point of view. Unlike other more "classic" digital circuits courses, our interest focuses more on the system than on the electronics that support it. This approach will allow us to lay the foundation for the design of complex digital systems.

Digital Systems: From Logic Gates to Processors


位教师:Elena Valderrama
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17 项作业
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该课程共有11个模块
This module is includes a number of general explanations about how the course will run and about the virtual machine you should install on your computer to answer the different quizzes.<br>This module presents a series of tests you can use to check your level of knowledge about numbering systems and the use of pseudocode to describe algorithms.
涵盖的内容
3个视频13篇阅读材料2个作业
3个视频•总计39分钟
- Course presentation•2分钟
- L0.1. Binary numeration system•19分钟
- L0.2. Algorithm representation in pseudocode•17分钟
13篇阅读材料•总计130分钟
- Course Organization•10分钟
- Syllabus and bibliography•10分钟
- CHANGES IN COURSERA•10分钟
- Grading policy•10分钟
- Certification•10分钟
- Solving doubts and technical issues•10分钟
- FAQs•10分钟
- About the forums•10分钟
- README•10分钟
- How to install the virtual machine (VM)•10分钟
- FAQs about installing the VM•10分钟
- Table of contents•10分钟
- PDF file•10分钟
2个作业•总计44分钟
- Practice quiz 0.1: Numeration systems•30分钟
- Practice quiz 0.2: Pseudocode•14分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b> <br/><br/>This module is an introduction to Digital Systems. Here you will find:<ol><li>A set of videos_L covering issue 1 and the corresponding exercises, </li><li>Two videos_P introducing the processor that we will design along the course, and</li><li>Some video-based explanations; a wiki and some FAQs about how VerilUOC_Desktop tool functions.<br/> You will have to use VerilUOC_Desktop in the next module</li></ol> Read the "Lesson Index" in the "Index and PDF files" section and the "README" in the VerilUOC_Desktop section for more information.
涵盖的内容
5个视频3篇阅读材料2个作业
5个视频•总计71分钟
- L1.1. Digital systems•12分钟
- L1.2 Digital system description •11分钟
- L1.3 Digital electronic systems•17分钟
- P1.1. Processor: Specification •12分钟
- P1.2. Examples of Programs •20分钟
3篇阅读材料•总计30分钟
- Lesson index•10分钟
- PDF files•10分钟
- Solved exercises•10分钟
2个作业•总计60分钟
- Practice quiz 1•30分钟
- Graded quiz 1•30分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b> <br/><br/>This module introduces combinational circuits, logic gates and boolean algebra, all of them items necessary to design simple combinational circuits.<br/> Read the "Index of lessons" for more information. <br/><br/><b>To solve the exercises in this module you will need to use VerilUOC_Desktop. Look at the module "VerilUOC_Desktop tools" to learn how to use it.</b>
涵盖的内容
5个视频3篇阅读材料2个作业
5个视频•总计101分钟
- L2.1. Combinational circuits•23分钟
- L2.2. Boolean Algebra•26分钟
- L2.3. NAND, NOR, XOR, NXOR, TRI-STATE•27分钟
- P2.1. Functional specification •13分钟
- P2.2. Structural specification •11分钟
3篇阅读材料•总计30分钟
- Lesson index•10分钟
- PDF files•10分钟
- Solved exercises•10分钟
2个作业•总计60分钟
- Practice quiz 2•30分钟
- Graded quiz 2•30分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>From this module you will need to use VerilUOC_Desktop to do some of the exercises in the quizzes. VerilUOC_Desktop is a software package based on Logisim, enhanced with a number of modules to enable:<ul><li>Enter Boolean equations (BoolMin),</li><li>Enter digital circuits and check them according the problem statement (VerilCirc), and</li><li>Enter chronograms (time-charts) and check that they are correct (VerilChart).</li></ul>This section contains two videos explaining how these three tools work. By now you only need to use VerilCirc and BoolMin, so if you are pushed for time, you might postpone VerilChart for later. Obviously, it is impossible to cover in these two videos all eventualities you can find while working with VerilUOC_Desktop tools. In case of doubt, look at the VerilUOC_Desktop wiki, look at the FAQs or post your problems in the forums. There are specific forums for VerilCirc, BoolMin and VerilChart.
涵盖的内容
2个视频3篇阅读材料
2个视频•总计33分钟
- Introduction to VerilUOC_Desktop (I). Logisim and VerilCirc•21分钟
- Introduction to VerilUOC_Desktop (II). BoolMin and VerilChart•12分钟
3篇阅读材料•总计30分钟
- Table of contents•10分钟
- VerilUOC_desktop wiki•10分钟
- VerilUOC_desktop FAQs•10分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>We continue the study of combinational circuits. While in the previous module we were working on the classical design techniques of combinational circuits, this one is focused on other issues such as a brief introduction to computer aided design tools (CAD tools), or the direct synthesis of combinational circuits from its algorithmic description.<br/> Read the "Lesson index" for more information. <br><br/><b>To solve the exercises in this module VerilUOC_Desktop is needed. </b>Remember that the module "VerilUOC_Desktop tols" contains all the information you need about this tool.
涵盖的内容
5个视频3篇阅读材料2个作业
5个视频•总计84分钟
- L3.1. Combinational circuit synthesis tools•22分钟
- L3.2. Propagation time•15分钟
- L3.3. Other logic blocks•24分钟
- L3.4. Programming language structures •14分钟
- P3.1. Structural specification (continuation) •9分钟
3篇阅读材料•总计30分钟
- Lesson index•10分钟
- PDF files•10分钟
- Solved exercises•10分钟
2个作业•总计46分钟
- Practice quiz 3•30分钟
- Graded quiz 3•16分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>Arithmetic circuits are an essential part of many digital circuits and thus deserve a particular treatment. <ul><li> The first part of this module presents some implementations of the basic arithmetic operations. Only operations with naturals (non-negative integers) are considered. </li><li>The second part of this module introduces the basics of VHDL with the goal of providing enough knowledge to understand its usage throughout this course and start developing basic hardware models.</li></ul>
涵盖的内容
10个视频9篇阅读材料1个作业
10个视频•总计167分钟
- L4.1 Arithmetic blocks•27分钟
- Lecture 4.2 (1outof2): Introduction to VHDL - Lexicon, syntax and structure•9分钟
- Lecture 4.2 (2outof2): Introduction to VHDL - Lexicon, syntax and structure•12分钟
- Lecture 4.3 (1outof2): Introduction to VHDL - Sequential sentences•11分钟
- Lecture 4.3 (2outof2): Introduction to VHDL - Sequential sentences•13分钟
- Lecture 4.4 (1outof2): Introduction to VHDL - Concurrent sentences•12分钟
- Lecture 4.4 (2outof2): Introduction to VHDL - Concurrent sentences•9分钟
- L4.2 Short introduction to VHDL I (OLD VERSION)•22分钟
- L4.3 Short introduction to VHDL II (OLD VERSION)•19分钟
- L4.4 Short introduction VHDL III (OLD VERSION)•33分钟
9篇阅读材料•总计90分钟
- IMPORTANT - README•10分钟
- Lesson index•10分钟
- PDF files•10分钟
- Lesson index (OLD VERSION)•10分钟
- PDF files (OLD VERSION)•10分钟
- IMPORTANT - README•10分钟
- No lecture about the processor in this module . Next video will be P5.1.•10分钟
- About the exercises (README)•10分钟
- Solved exercises - Arithmetic circuits•10分钟
1个作业•总计30分钟
- Practice quiz 4•30分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>This is the first module dedicated to Sequential Circuits (Digital Systems with Memory).<br/><b>To solve the quizzes you will need VerilUOC_Desktop</b>.
涵盖的内容
7个视频3篇阅读材料2个作业
7个视频•总计79分钟
- L5.1 Sequential circuits•11分钟
- L5.2 Explicit functional description•16分钟
- L5.3 Latches and flip-flops•16分钟
- L5.4 Synthesis from tables•9分钟
- L5.5 An example of synthesis•2分钟
- P5.1 Combinational blocks•13分钟
- P5.2 Sequential blocks•12分钟
3篇阅读材料•总计30分钟
- Lesson index•10分钟
- PDF files•10分钟
- Solved exercises•10分钟
2个作业•总计40分钟
- Practice quiz 5•10分钟
- Graded quiz 5•30分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>This second module dedicated to Sequential Circuits deals with particular sequential circuits that are building blocks of larger circuits, namely registers, counters and memory blocks.
涵盖的内容
4个视频3篇阅读材料2个作业
4个视频•总计59分钟
- L6.1. Registers•18分钟
- L6.2. Counters•16分钟
- L6.3. Memories•15分钟
- P6.1. Sequential blocks (continuation)•11分钟
3篇阅读材料•总计30分钟
- Lesson index•10分钟
- PDF files•10分钟
- Solved exercises•10分钟
2个作业•总计60分钟
- Practice quiz 6•30分钟
- Graded quiz 6•30分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>This module deals with two topics: <ol><li>In previous lessons, the relation between algorithms (programming language structures) and combinational circuits has been commented. This relation also exists between algorithms and sequential circuits. We will explore this relation in the current module.</li><li>The second topic we will see is the definition and VHDL modelling of Finite State Machines.</li></ol>
涵盖的内容
5个视频4篇阅读材料2个作业
5个视频•总计81分钟
- L7.1. Sequential implementation of algorithms•15分钟
- L7.2. Finite state machines•16分钟
- L7.3. Examples of finite state machines•23分钟
- P7.1. Sequential blocks (continuation)•11分钟
- P7.2. Instructions, control, complete circuit•17分钟
4篇阅读材料•总计40分钟
- Lesson index•10分钟
- PDF files•10分钟
- Solved exercices•10分钟
- QUIZ 7 INSTRUCTIONS•10分钟
2个作业•总计60分钟
- Practice quiz 7•30分钟
- Graded quiz 7•30分钟
<b><font size=4 color=#B22222><b>Click on "v More" to read the purpose of this module</b></font> </b><br/><br/>This last module presents some basic information about manufacturing technologies, as well as about implementation strategies, and synthesis and implementation tools.
涵盖的内容
4个视频2篇阅读材料2个作业
4个视频•总计47分钟
- L8.1. Physical implementation •10分钟
- L8.2. Implementation strategies and synthesis tools •11分钟
- P8.1. Test •12分钟
- P8.2. Design methods•15分钟
2篇阅读材料•总计20分钟
- Lesson index•10分钟
- PDF files•10分钟
2个作业•总计38分钟
- Practice quiz 8•8分钟
- Graded quiz 8•30分钟
´´
涵盖的内容
3篇阅读材料
3篇阅读材料•总计30分钟
- Farewell•10分钟
- What have we learned?•10分钟
- How can I go deeper into the topic?•10分钟
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授课教师
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The Universitat Autònoma de Barcelona (UAB) is a public university located in the metropolitan area of Barcelona. International in its outlook, it is fully consolidated within its local surroundings, and offers quality education in close association with research activity, the transfer of scientific, technological, cultural and educational knowledge, the promotion of its human potential and the responsible management of available resources. The UAB currently offers 81 degrees, 130 official Master Programmes and 183 UAB-specific Masters Degrees. In addition, it offers 174 lifelong learning programmes and 65 PhD Programmes, 27 of which have been distinguished through Quality Awards. The UAB has a total of over 3,500 teaching and research staff, over 2,000 administrative staff and over 40,000 students.
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858 条评论
- 5 stars
63.51%
- 4 stars
21.32%
- 3 stars
6.06%
- 2 stars
2.56%
- 1 star
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已于 Oct 21, 2019审阅
I'd give this course 6 stars, if I could. I hope there will be additional courses released that extend upon this material.
已于 Jul 10, 2022审阅
The most interesting part of this course, for me, was the graded quiz. It was challenging , but nice.I really learnt a lot.Thank you
已于 Sep 9, 2019审阅
It's not a easy course for me, but the practice exercise is enough for me to get deeper understanding in course content.
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